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![]() ![]() I read that the original 8088/8086 took 4 clocks per bus cycle, transferring 8/16 bits respectively so that's probably in the same ballpark for a machine in the 8-10MHz class, and likely fine for emulating slow 4.77MHz machines. At 320MHz there may be some potential to get from 3 to 4 separate PSRAM reads or writes in per microsecond, excluding the instruction execution. I sort of wonder what would happen if we tacked on some really tight PSRAM reading code (like Wuerfel_21 uses) using simple 4-bit wide PSRAM so as to avoid RMW requirements. Looking at your x86 emulator I see it accesses memory through iread_memb and iwrite_memb entry points.
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